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Hans Salomonsson
CEO @ EmbeDL
EU-IoT Training Workshops Series:
Next Generation IoT Architectures
8. Nov 2021
VEDLIoT - Toolchain for Efficient Deep
Learning on heterogenous hardware
2
 Research
 Hardware: Scalable, heterogeneous, distributed
 Accelerators: Efficiency boost by FPGA and ASIC technology
 Toolchain: Optimizing Deep Learning for IoT
 Use cases
 Industrial IoT
 Automotive
 Smart Home
 Open call
 At project mid-term
 Early use and evaluation of VEDLIoT technology
Very Efficient Deep Learning IoT – VEDLIoT
 Call: H2020-ICT2020-1
 Topic: ICT-56-2020 Next Generation Internet
of Things
 Duration: 1. November 2020 – 31. Oktober
2023
 Coordinator: Bielefeld University (Germany)
 Consortium: 12 partners from 4 EU countries
(Germany, Poland, Portugal and Sweden) and
one associated country (Switzerland).
More info:
 https://www.vedliot.eu/
 https://twitter.com/VEDLIoT
 https://www.linkedin.com/company/vedliot/
3
Deep Learning IoT Architecture
t.RECS
u.RECS
Edge
RECS|Box
Optimized Deep Learning
Model
(inference)
Cloud
Embedded
4
VEDLIoT Hardware Platform
 Heterogeneous, modular, scalable microserver system
 Supporting the full spectrum of IoT from embedded over the edge towards the cloud
 Different technology concepts for improving
x86
GPU
ML-ASIC
ARM v8
GPU
SoC
FPGA
SoC
RISC-V
FPGA
VEDLIOT Cognitive
IoT Platform
 Performance
 Cost-effectiveness
 Maintainability
 Reliability
 Energy-Efficiency
 Safety
5
Microserver overview
t.RECS
RECS|Box
u.RECS
6
VEDLIoT‘s Deep Learning Toolchain
• Image
Classification
• Object Detection
• Semantic
Segmentation
• Instance
Segmentation
• Extractive
Question
Answering
Model Zoo Optimization
Engine
Compilers &
Runtime APIs
Heterogeneous
Hardware
Platforms
7
Model ZOO
8
Model ZOO
9
Model ZOO
10
Efficent deep learning for IoT
11
1. Optimization Engine
12
3.a Hardware Evaluation
13
3.a Hardware Evaluation
14
1&3 Flexible and adaptable Accelerators for
Deep Learning
DL Model
DL Model
CPU, GPU-
SoC,
ML-SoC
FPGA-SoC
 End of Moore’s law & dark silicon –
Domain Specific Architectures (DSA)
 Efficient, flexible, scalable accelerators for
the compute continuum
 Algotecture
 Optimized DL algorithms
 Optimized toolchain
 Optimized computer architecture
Heterogeneous DL
Accelerator
Algotecture/
Co-Designed DL
Accelerator
Optimizer &
Compiler
Co-Design
15
The fun has just started!
Follow our work!
https://twitter.com/VEDLIoT
https://www.linkedin.com/company/vedliot/
https://vedliot.eu
Be part of it
Open call at project mid-term
Allow early use and evaluation of VEDLIoT
technology
16
Thank you for your
attention.
Me
Hans Salomonsson
EmbeDL, Sweden
hans@embedl.ai
Contact
Jens Hagemeyer, Carola Haumann
Bielefeld University, Germany
chaumann@cor-lab.uni-bielefeld.de
jhagemey@cit-ec.uni-bielefeld.de

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Next Generation IoT Architectures_Hans Salomonsson

  • 1. Hans Salomonsson CEO @ EmbeDL EU-IoT Training Workshops Series: Next Generation IoT Architectures 8. Nov 2021 VEDLIoT - Toolchain for Efficient Deep Learning on heterogenous hardware
  • 2. 2  Research  Hardware: Scalable, heterogeneous, distributed  Accelerators: Efficiency boost by FPGA and ASIC technology  Toolchain: Optimizing Deep Learning for IoT  Use cases  Industrial IoT  Automotive  Smart Home  Open call  At project mid-term  Early use and evaluation of VEDLIoT technology Very Efficient Deep Learning IoT – VEDLIoT  Call: H2020-ICT2020-1  Topic: ICT-56-2020 Next Generation Internet of Things  Duration: 1. November 2020 – 31. Oktober 2023  Coordinator: Bielefeld University (Germany)  Consortium: 12 partners from 4 EU countries (Germany, Poland, Portugal and Sweden) and one associated country (Switzerland). More info:  https://www.vedliot.eu/  https://twitter.com/VEDLIoT  https://www.linkedin.com/company/vedliot/
  • 3. 3 Deep Learning IoT Architecture t.RECS u.RECS Edge RECS|Box Optimized Deep Learning Model (inference) Cloud Embedded
  • 4. 4 VEDLIoT Hardware Platform  Heterogeneous, modular, scalable microserver system  Supporting the full spectrum of IoT from embedded over the edge towards the cloud  Different technology concepts for improving x86 GPU ML-ASIC ARM v8 GPU SoC FPGA SoC RISC-V FPGA VEDLIOT Cognitive IoT Platform  Performance  Cost-effectiveness  Maintainability  Reliability  Energy-Efficiency  Safety
  • 6. 6 VEDLIoT‘s Deep Learning Toolchain • Image Classification • Object Detection • Semantic Segmentation • Instance Segmentation • Extractive Question Answering Model Zoo Optimization Engine Compilers & Runtime APIs Heterogeneous Hardware Platforms
  • 14. 14 1&3 Flexible and adaptable Accelerators for Deep Learning DL Model DL Model CPU, GPU- SoC, ML-SoC FPGA-SoC  End of Moore’s law & dark silicon – Domain Specific Architectures (DSA)  Efficient, flexible, scalable accelerators for the compute continuum  Algotecture  Optimized DL algorithms  Optimized toolchain  Optimized computer architecture Heterogeneous DL Accelerator Algotecture/ Co-Designed DL Accelerator Optimizer & Compiler Co-Design
  • 15. 15 The fun has just started! Follow our work! https://twitter.com/VEDLIoT https://www.linkedin.com/company/vedliot/ https://vedliot.eu Be part of it Open call at project mid-term Allow early use and evaluation of VEDLIoT technology
  • 16. 16 Thank you for your attention. Me Hans Salomonsson EmbeDL, Sweden hans@embedl.ai Contact Jens Hagemeyer, Carola Haumann Bielefeld University, Germany chaumann@cor-lab.uni-bielefeld.de jhagemey@cit-ec.uni-bielefeld.de