This document provides an overview of the TULIPP project which aims to develop low-power platforms for image processing applications. It outlines the project goals of enabling safer driving, more intelligent drones, and reduced medical radiation doses. The document discusses the TULIPP reference platform methodology, hardware and software components including the Hipperos operating system and STHEM toolchain. It also describes the driver assistance, UAV, and medical use cases and how the TULIPP platform can accelerate and lower the power of image processing for these applications.
This document discusses education using FIRE (Future Internet Research and Experimentation) testbeds. It provides an overview of FORGE (Forging Online Education through FIRE), including details about FIRE, an example wireless networking course, and FORGE tools and an open call. The example course shows how it was implemented using the iMinds w-iLab.t and Virtual Wall testbeds, with remote and automated experimentation. The open call invites proposals to develop interactive educational materials using FIRE facilities.
This document discusses cyber-physical systems (CPS) and the TULIPP project. It provides an overview of Sundance, an electronics design company, and some of their open hardware contributions. The document discusses why open hardware is beneficial, providing examples like design reuse and peer review. It then describes the goals and work packages of the TULIPP project, which aims to develop an energy efficient image processing platform. Medical imaging, autonomous driving, and drone applications are discussed as use cases. Guidelines are provided for optimizing performance on multicore processors using OpenMP. Finally, expanding the ecosystem around the TULIPP project through an advisory board is mentioned.
e-Infrastructure available for research, using the right tool for the right jobDavid Wallom
This document provides an overview of e-infrastructure resources available for research. It describes what e-infrastructure is and its main components like data storage, software, hardware, networks, security, and people. It discusses different types of computational resources including supercomputers, parallel programming, high performance computing, distributed and shared memory models, and GPU computing. It also outlines institutional, regional, national, and international e-infrastructure resources in the UK like advanced computing centers, EPSRC regional centers, HECToR/ARCHER, and PRACE. Finally, it briefly discusses high throughput computing and examples of applications of e-infrastructure like virus analysis, fusion reactor modeling, and Alzheimer's disease research.
This document discusses MLOps and Kubeflow. It begins with an introduction to the speaker and defines MLOps as addressing the challenges of independently autoscaling machine learning pipeline stages, choosing different tools for each stage, and seamlessly deploying models across environments. It then introduces Kubeflow as an open source project that uses Kubernetes to minimize MLOps efforts by enabling composability, scalability, and portability of machine learning workloads. The document outlines key MLOps capabilities in Kubeflow like Jupyter notebooks, hyperparameter tuning with Katib, and model serving with KFServing and Seldon Core. It describes the typical machine learning process and how Kubeflow supports experimental and production phases.
This document summarizes the STHEM project, which aims to enhance productivity for developing energy-efficient image processing systems on embedded platforms. It describes several utilities developed as part of STHEM, including a power measurement utility (PMU) for profiling power consumption, an analysis utility (AU) for visualizing profiling data and performing static analysis, an image processing library called HiFiipVX, and utilities for dynamic partial reconfiguration, I/O, and FPGA debugging. The PMU allows non-intrusive power measurements with up to 10kHz sampling, while the AU enables profiling, visualization of profiling data, and design space exploration. HiFiipVX is an open source HLS FPGA image processing library containing
Presentation at the FORGE workshop collocated with the World Engineering Education Forum (WEEF), the International Conference on Interactive Collaborative Learning (ICL) and the International Conference on Engineering Pedagogy (IGIP) in Florence, Italy on September 20th, 2015.
1. The document summarizes activities from an open source workshop held at Birzeit University, including installing and testing open source software, implementing thin client systems in schools, and establishing an open source support center.
2. Key projects involved setting up Linux Terminal Server Project systems in schools and the university library to provide more students access to computers in a cost-effective way.
3. Outputs included technical documentation, an online wiki, documentary films, and training resources to establish open source culture and support future projects.
Ozden Akinci is a Chief Engineer with over 15 years of experience in IT management, data center management, and HPC systems management. He has extensive experience administrating large HPC systems, managing IT teams and projects, and developing policies and procedures for effective IT infrastructure and services. His technical skills and qualifications include expertise in Linux/Unix systems administration, cluster computing, storage solutions, and high-performance applications.
In this ACM Tech Talk, Doug Kothe from ORNL presents: The Exascale Computing Project and the future of HPC.
"The mission of the US Department of Energy (DOE) Exascale Computing Project (ECP) was initiated in 2016 as a formal DOE project and extends through 2022. The ECP is designing the software infrastructure to enable the next generation of supercomputers—systems capable of more than 1018 operations per second—to effectively and efficiently run applications that address currently intractable problems of strategic importance. The ECP is creating and deploying an expanded and vertically integrated software stack on US Department of Energy (DOE) HPC exascale and pre-exascale systems, thereby defining the enduring US exascale ecosystem."
Watch the video: https://wp.me/p3RLHQ-kep
Learn more: https://www.exascaleproject.org/
Sign up for our insideHPC Newsletter: http://insidehpc.com/newsletter
The document summarizes the agenda for OPAL-RT's Regional User Seminar in Atlanta, GA on February 15th, 2017. It includes panels on real-time power system simulation, partner technology overviews, hardware-in-the-loop applications, and real-time microgrid demos. It also provides updates on OPAL-RT's expansion in Latin America, research collaborations in the US, involvement in an aircraft technology project in Canada, and new product features and releases.
This document provides an overview of using TensorFlow and Quarkus to build intelligent applications that serve machine learning models. It begins with an introduction and agenda. It then discusses TensorFlow and how it can be used to build and train machine learning models. It demonstrates how a TensorFlow model can be served using Quarkus and consumed via HTTP requests. The technical benefits of serving models with Quarkus are described. Finally, use cases, additional resources, and a Q&A section are outlined.
This document discusses automatic transcription of video files. It describes the transLectures project, which developed tools for automated speech recognition and translation of educational videos. It also discusses the Opencast Project, an open-source platform for lecture capture and video management that supports plugging in automatic transcriptions for search capabilities. Current state-of-the-art transcription has word error rates around 15-25% for some languages, and transcription speed is an area still needing improvement. Indexing and search servers like Lucene are used to enable powerful search of video transcripts and content.
This is a presentation by Prof. Anne Elster at the International Workshop on Open Source Supercomputing held in conjunction with the 2017 ISC High Performance Computing Conference.
Deep learning libraries TensorFlow and PyTorch are commonly used for machine learning. TensorFlow was developed by Google and has a faster compilation time than Keras or PyTorch. It supports CPUs and GPUs and uses data flow graphs with nodes and edges. PyTorch was originally developed as a Python wrapper for Torch and is pythonic in nature with dynamic computation graphs. Both support tensor computations and automatic differentiation, with PyTorch having richer APIs but fewer built-in tools than TensorFlow.
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The document introduces TULIPP starter kits, which are deployment-ready solutions for image processing powered by Zynq SoC and FPGA chips. The starter kits use the PC/104 form factor and include carrier boards, system-on-modules, and I/O expansion modules. Example starter kits are introduced for applications in ADAS, medical, UAV, agriculture, and more, each with different sensor and interface specifications. Early success of a starter kit for agriculture applications is also mentioned.
This project aims to develop ubiquitous low-power image processing platforms. It has several objectives including defining a reference platform, instantiating it through use cases, and demonstrating performance improvements. Several partners from industry and academia are involved. Key tasks include selecting hardware components, developing interfaces and tools, and validating the platform using applications like medical imaging, automotive driver assistance, and unmanned aerial vehicles. An initial hardware instance was selected using the Sundance EMC2 board with an ARM CPU and FPGA. The UAV use case involves real-time stereo depth estimation for obstacle avoidance.
HiPEAC 2019 Workshop - Vision ProcessingTulipp. Eu
The document discusses machine vision and Xilinx's solutions for it. It covers the Zynq and Zynq UltraScale+ architectures, SDSoC for automated algorithm to hardware conversion, libraries and PYNQ for productivity, and reduced precision deep neural networks. The Xilinx University Program provides resources like Vivado, SDSoC and SDAccel design tools, academic boards, workshops and partnerships to support teaching and research in machine vision using Xilinx platforms.
HiPEAC 2019 Workshop - Real-Time Modelling Visual Scenes with Biological Insp...Tulipp. Eu
- Computer vision has improved with more data and processing power, but global scene understanding remains challenging.
- The document proposes a multidisciplinary approach combining CNNs and human visual cognition to better model scene understanding, with the goal of applications like autonomous vehicles.
- It describes experiments observing how humans and primates recognize scenes to inform modeling, incorporating global and local descriptors with relationships. This approach aims to advance scene understanding capabilities.
HiPEAC 2019 Tutorial - Image Processing Library:HiFlipVXTulipp. Eu
This document describes an open source high-level synthesis FPGA library called HiFlipVX for image processing. The library contains 21 image processing functions including pixel-wise operations, filters, and image conversion and analysis functions. It is optimized for high-level synthesis and supports auto-vectorization, different data types and kernel sizes. Example applications and exercises are provided to demonstrate using the library functions to implement image processing pipelines in hardware.
HiPEAC 2019 Workshop - Hardware Starter Kit Agri Tulipp. Eu
The TSK-Agri is an energy efficient embedded image processing board featuring a Xilinx Zynq UltraScale+ MPSoC processor. It has various I/O including digital, analog and USB ports, compatibility with common sensors and frameworks like ROS and OpenCV, and open source software/firmware. An example application involves computer vision and the board is optimized for tasks like deep learning on neural networks with low power consumption and high performance.
The document describes three use cases implemented on the Tulipp embedded platform:
1) Pedestrian detection for ADAS achieving 15 frames/s with 2-3 frame latency.
2) Stereo depth estimation for UAVs performing in real-time with streaming optimization.
3) Medical image processing reducing radiation dose by 4x and enhancing images at 30 frames/s.
The Tulipp tools and SDSoc/Vivado HLS were used to implement algorithms from C/C++ onto the FPGA-based platform while addressing challenges of memory, streaming, and hardware-suitability. Overall, the Tulipp platform performed well across different applications with high-level development.
This document discusses the TULIPP Agri Kit, which aims to help productively develop safe, reliable, intelligent and efficient agricultural robots. The TULIPP Agri Kit provides certifiable hard real time performance, integrated artificial intelligence, a scalable high performance platform, ROS compatibility, and supports various vision interfaces to help lower development costs and time to market. It also received funding from the European Union's Horizon 2020 research and innovation programme.
TULIPP H2020 Project: Low power high performance real-time computer vision on...Tulipp. Eu
The document discusses the TULIPP project, which aims to develop a reference platform for low-power, high-performance embedded image processing. The project seeks to define implementation rules and interfaces to allow flexible yet optimized platforms. A key focus is supporting real-time applications with intensive image processing needs across various domains like medical, automotive, robotics. The reference platform combines heterogeneous hardware, an RTOS, and toolchain. Initial work uses an ARM+FPGA board and the HIPPEROS RTOS. Representative use cases help demonstrate the platform's capabilities.
This document describes the current progress towards defining the reference platform. The reference platform is presented in the context of the starter kit, a conceptual package consisting of the platform instance, project applications, and reference platform handbook. The aim of the starter kit is to provide engineers with a generic evaluation platform that serves as a base for productively developing low power image processing applications.
Samos July 2016_tulipp-H2020 project presentationTulipp. Eu
This document summarizes the TULIPP project, which aims to develop a reference platform for ubiquitous low-power image processing. The project receives EU funding and involves 8 partners. It will define implementation rules and interfaces for a scalable hardware architecture using heterogeneous systems-on-chip. An real-time OS and toolchain will support image processing applications on this platform. Medical imaging, automotive driver assistance, and autonomous drone applications will serve as use cases to validate the reference platform.
Tulipp collaboration Workshop - Advanced Computing and CPS - June 2016Tulipp. Eu
The document discusses the TULIPP project which received EU Horizon 2020 funding. It describes the goals for the TULIPP processor node to be heterogeneous, low-power, and flexible for real-world I/O. It outlines the TULIPP reference platform containing a scalable low-power board, low-power OS, and energy-aware toolchain driven by use cases. Example use cases mentioned are for unmanned aerial vehicles, medical imaging to reduce radiation dose, and automotive advanced driver assistance. The document requests interested individuals to join the advisory board by visiting a link or emailing the project coordinator.
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HiPEAC 2019 Workshop Overview
1. This project has received funding from
the European Union’s Horizon 20 20
research and innovation programme
under grant agreement No 688403
www.tulipp.eu
TULIPP
Title :
Place :
Date :
Tulipp Workshop @ HIPEAC
Towards Ubiquitous Low-power Image Processing Platform –
project overview
HiPeac, Valencia, Spain
22nd of January 2019
Philippe Millet, Coordinator
2. Workshop Agenda
• 10:00 Opening Session
• 10:05 Philippe Millet, Thales
• Overall presentation of the project and the objectives
• 10:45 Magnus Peterson, Synective Labs
• The three use cases: description of the challenges + what’s hard to solve with current
solutions
• 11:00 11:30 Coffee Break
• 11:30 Magnus Peterson, Synective Labs (continued talk)
• 12:00 Invited Speaker Kofi Appiah, Sheffield Hallam University
• Real-Time Modelling of Visual Scenes with Biological Inspiration
• 12:25 Invited Speaker Paolo Burgio, UNIMORE
• Computer vision for autonomous driving using commercial-off-the-shelf platforms and the
Hercules framework
• 12:50 Diana Goehringer, TUD
• Conclusion
• 13:00 Lunch
3. What is TULIPP?
Goal: Safer driving experience
Goal: Bring intelligence to the drones
Goal: Reduce Radiation Dose by 75%
• Everything started with a common need for
• High performance
• Real-time
• Low-Power
• Embedded
• Image processing applications
4. What is TULIPP?
Tulipp: Bringing energy efficiency from chip level to system level
Intensive Image Processing Embedded
Constraints
Time-to-market / Cost-
sensitive
Source: http://www.lnci.org.au
6. How we proceed
WP7: Management, Coordination
LABEL : Marketing, Ecosystem and Pre-normalisation
WP6: IP protection, Dissemination, Communication, Advisory Board
and Exploitation preparation
WP1: Reference platform definition
(Interfaces & implementation Rules)
Instantiations
WP2:
Hardware
WP4:
Programming
Toolchain
WP3:
Runtime, API,
Libraries & OS
feedback WP5 : Usecases description
and Integration and platform
validation
7. The Reference Platform in a book
Methodology captured
in a book
+
Guidelines to provide
expert hints on common
issues & valuable
implementation clues
8. • A guideline is insights that occurred while working on the project.
It can be a result of:
• running experiments
• our expertise
• reading other documents
• teaching something to "a student"
Like:
• Do not use floating point computation on FPGA
• Avoid using heavy libraries while writing source code for
embedded systems
• …
Guidelines
11. The Starter kit: how it works
Goal-oriented
Advice
Instantiation
Recommended
Implementation
Methods
Project Applications
Platform Instance
12. Focus on the TULIPP Starter-Kit
Available during the final tutorial
• HW instance based on Xilinx Zynq U+
• Power aware RT operating system
• Toolchain support for efficient implementation
• Sample applications
• The TULIPP Handbook
19. The TULIPP Operating system: HIPPEROS Maestro
M
A
E
S
T
R
O
Maestro, an RTOS for Multi-cores
20. The TULIPP Operating system: Hipperos Maestro
Maestro is designed for hard Real-Time applications
• Determinism & bounded guarantees
• Checks & controls deadlines of tasks with Real-Time scheduling policies
• Resource usage is bounded and checked
21. The TULIPP Operating system: Hipperos Maestro
Maestro is a new micro-kernel
• No legacy from any former mono-core OS like “Linux”
• Designed to leverage the power of multi-core architectures
• Unlike other RTOS, Maestro is Multi-core at its very heart
22. The TULIPP Operating system: Hipperos Maestro
Maestro is designed for embedded application
• small memory footprint
• ported on embedded processors ARM (v7, v8) and PowerPC
• support FPGA
23. The TULIPP Operating system: Hipperos Maestro
Maestro is a full featured RTOS
• MMU support
• resource sharing
• usual OS services (timers, etc...)
24. We need to manage the power
•We have
• a power optimised and tuneable hardware
• a power efficient operating system
• optimised image processing libraries
25. Embedded Control the energy
• Heterogeneous platform tasks mapping
• How to make sure we did the best mapping? (energy)
Intensive Image Processing Embedded
Constraints
Time-to-market / Cost-
sensitive
Source: http://www.lnci.org.au
29. STHEM: The TULIPP Tool-chain
Support uTilities for Heterogeneous EMbedded image
processing (STHEM)
Insights:
• Significant effort has been invested into the
development of vendor tools
• STHEM fills the productivity gaps between existing tools
30. STHEM: The TULIPP Tool-chain
• Supports development for all platform components
• Maps source files of the application to the
appropriate tool chain
• Retrieves OS configuration from the developer
Development and Mapping
31. STHEM: The TULIPP Tool-chain
• Boots OS with selected configuration (if needed due to
changed configuration)
• Updates files (binaries, bitfiles, etc.)
• Initialises the reconfigurable logic (if needed)
• Starts the application with the requested instrumentation
Runner
32. STHEM: The TULIPP Tool-chain
• Analyses performance results and presents
findings to the developer
Analyser
33. The Generic Development Process
Connect and
abstract
STHEM =
Supporting
uTilities for
Heterogeneous
Embedded image
processing
platforms
Support for TULIPP
platform instances
38. Advanced Driver Assistance Systems
• Pedestrian detection for collision avoidance
• Based on Viola-Jones object detection
• Operates on 640x480 24-bit images
Original
C/C++
code
Adapted
C/C++
code
Accelerated on the
Tulipp Platform
(Xilinx ZU3)
PC platform
150 W
10 s/frame
15 W
66 ms/frame
39. Unmanned Aerial Vehicle
𝐼left, 𝐼right
Obstacle
avoidance
Disparity
estimation
𝐷
Original
C/C++
code
Adapted
C/C++
code
Accelerated on the
Tulipp Platform
(Xilinx ZU3)
15 W
29 frame/s
29ms latency
40. Medical Use Case
Original
C/C++
code
Adapted
C/C++
code
Accelerated on the
Tulipp Platform
(Xilinx ZU3)
15 W
29 frame/s
29ms latency
• X-ray video for surgery
• Embedded on the sensor
• Lower radiation doses by factor 4
• Image denoise & enhancement
• 1024x1024 24-bit images
sensor